<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>OCUDU India on OCUDU India Docs</title><link>https://docs.ocuduindia.org/</link><description>Recent content in OCUDU India on OCUDU India Docs</description><generator>Hugo</generator><language>en</language><atom:link href="https://docs.ocuduindia.org/index.xml" rel="self" type="application/rss+xml"/><item><title>Intel ACC100 LDPC offload</title><link>https://docs.ocuduindia.org/docs/hardware-acceleration/acc100-ldpc/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://docs.ocuduindia.org/docs/hardware-acceleration/acc100-ldpc/</guid><description>&lt;div class="pageinfo pageinfo-info"&gt;
&lt;p&gt;&lt;strong&gt;Scope:&lt;/strong&gt; hardware-accelerated LDPC encoding (PDSCH) and decoding (PUSCH)
on Intel ACC100 vRAN accelerator cards, with full upper-PHY metrics
instrumentation so operators can directly compare CPU-software and
HW-offload performance in production logs.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Introduced in commit:&lt;/strong&gt; &lt;code&gt;aa6db7d066&lt;/code&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;h2 id="highlights"&gt;Highlights&lt;a class="td-heading-self-link" href="#highlights" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;LDPC offload for both PDSCH and PUSCH&lt;/strong&gt; the most CPU-heavy channel-coding
steps move off the host and onto the accelerator.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Configuration-driven&lt;/strong&gt; enable or disable via the DU YAML; no code changes.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Multi-VF scaling&lt;/strong&gt; allowlisting additional ACC100 VFs automatically
spreads load across them.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Unified metrics&lt;/strong&gt; the same per-block PHY metric fields populate whether
LDPC runs in software (AVX-512) or on the accelerator, enabling direct
side-by-side comparison from one log format.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Measured gains on real traffic&lt;/strong&gt; significantly lower PUSCH decode
latency, tighter tail latency, higher processor throughput, and reduced
upper-PHY uplink CPU (see &lt;a href="https://docs.ocuduindia.org/docs/hardware-acceleration/acc100-ldpc/#7-results"&gt;§7&lt;/a&gt;).&lt;/li&gt;
&lt;/ul&gt;
&lt;h2 id="1-prerequisites"&gt;1. Prerequisites&lt;a class="td-heading-self-link" href="#1-prerequisites" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;h3 id="11-hardware"&gt;1.1 Hardware&lt;a class="td-heading-self-link" href="#11-hardware" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h3&gt;
&lt;ul&gt;
&lt;li&gt;Intel &lt;strong&gt;ACC100&lt;/strong&gt; PCIe card, SR-IOV capable; at least one VF exposed to the host.&lt;/li&gt;
&lt;li&gt;x86-64 CPU with AVX2 (AVX-512 recommended for the software-fallback path).&lt;/li&gt;
&lt;li&gt;≥ &lt;strong&gt;2 GB of 2 MiB hugepages&lt;/strong&gt;.&lt;/li&gt;
&lt;li&gt;PCIe slot on the &lt;strong&gt;same NUMA node&lt;/strong&gt; as the upper-PHY worker cores.&lt;/li&gt;
&lt;/ul&gt;
&lt;h3 id="12-software"&gt;1.2 Software&lt;a class="td-heading-self-link" href="#12-software" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h3&gt;
&lt;table&gt;
 &lt;thead&gt;
 &lt;tr&gt;
 &lt;th&gt;Component&lt;/th&gt;
 &lt;th&gt;Minimum version&lt;/th&gt;
 &lt;th&gt;Notes&lt;/th&gt;
 &lt;/tr&gt;
 &lt;/thead&gt;
 &lt;tbody&gt;
 &lt;tr&gt;
 &lt;td&gt;DPDK&lt;/td&gt;
 &lt;td&gt;22.11&lt;/td&gt;
 &lt;td&gt;Tested with 25.11; ACC100 PMD (&lt;code&gt;baseband_acc&lt;/code&gt;) required.&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;Linux kernel&lt;/td&gt;
 &lt;td&gt;5.15+&lt;/td&gt;
 &lt;td&gt;IOMMU enabled (&lt;code&gt;intel_iommu=on iommu=pt&lt;/code&gt;).&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;&lt;code&gt;pf_bb_config&lt;/code&gt;&lt;/td&gt;
 &lt;td&gt;24.03+&lt;/td&gt;
 &lt;td&gt;PF configurator daemon; must run continuously.&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;DU build flags&lt;/td&gt;
 &lt;td&gt;&lt;code&gt;ENABLE_DPDK=True&lt;/code&gt;, &lt;code&gt;ENABLE_PDSCH_HWACC=True&lt;/code&gt;, &lt;code&gt;ENABLE_PUSCH_HWACC=True&lt;/code&gt;&lt;/td&gt;
 &lt;td&gt;See &lt;a href="https://docs.ocuduindia.org/docs/hardware-acceleration/acc100-ldpc/#5-build-guide"&gt;§5&lt;/a&gt;.&lt;/td&gt;
 &lt;/tr&gt;
 &lt;/tbody&gt;
&lt;/table&gt;
&lt;h3 id="13-kernel-and-vfio-setup"&gt;1.3 Kernel and VFIO setup&lt;a class="td-heading-self-link" href="#13-kernel-and-vfio-setup" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h3&gt;
&lt;div class="highlight"&gt;&lt;pre tabindex="0" class="chroma"&gt;&lt;code class="language-bash" data-lang="bash"&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="c1"&gt;# Kernel boot parameters (then update-grub + reboot):&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="nv"&gt;intel_iommu&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;on &lt;span class="nv"&gt;iommu&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;pt &lt;span class="nv"&gt;hugepagesz&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;2M &lt;span class="nv"&gt;hugepages&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;&lt;span class="m"&gt;1024&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="c1"&gt;# Hugepage mount if not done by distro:&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="nb"&gt;echo&lt;/span&gt; &lt;span class="m"&gt;1024&lt;/span&gt; &lt;span class="p"&gt;|&lt;/span&gt; sudo tee /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="c1"&gt;# Load VFIO modules:&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;sudo modprobe vfio-pci
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="nb"&gt;echo&lt;/span&gt; &lt;span class="m"&gt;1&lt;/span&gt; &lt;span class="p"&gt;|&lt;/span&gt; sudo tee /sys/module/vfio_pci/parameters/enable_sriov &lt;span class="c1"&gt;# if kernel-builtin&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="c1"&gt;# Create one SR-IOV VF and bind it to vfio-pci:&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="nb"&gt;echo&lt;/span&gt; &lt;span class="m"&gt;1&lt;/span&gt; &lt;span class="p"&gt;|&lt;/span&gt; sudo tee /sys/bus/pci/devices/&amp;lt;ACC100_PF_BDF&amp;gt;/sriov_numvfs
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;sudo dpdk-devbind.py --bind&lt;span class="o"&gt;=&lt;/span&gt;vfio-pci &amp;lt;ACC100_VF_BDF&amp;gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="c1"&gt;# Start pf_bb_config holding the PF group open with a VF token.&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;&lt;span class="c1"&gt;# The token (UUID) is required in the DU&amp;#39;s EAL args.&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt;sudo /opt/pf-bb-config/pf_bb_config ACC100 &lt;span class="se"&gt;\
&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt; -c /opt/pf-bb-config/acc100/acc100_config_vf_5g.cfg &lt;span class="se"&gt;\
&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;span class="line"&gt;&lt;span class="cl"&gt; -v &amp;lt;UUID&amp;gt; &lt;span class="p"&gt;&amp;amp;&lt;/span&gt;
&lt;/span&gt;&lt;/span&gt;&lt;/code&gt;&lt;/pre&gt;&lt;/div&gt;&lt;p&gt;After setup, &lt;code&gt;dpdk-test-bbdev&lt;/code&gt; should enumerate the VF as &lt;code&gt;intel_acc100_vf&lt;/code&gt;.&lt;/p&gt;</description></item><item><title>Hardware-accelerated LDPC in OCUDU: ACC100 offload now available</title><link>https://docs.ocuduindia.org/blog/2026/04/22/acc100-ldpc-hwacc/</link><pubDate>Wed, 22 Apr 2026 00:00:00 +0000</pubDate><guid>https://docs.ocuduindia.org/blog/2026/04/22/acc100-ldpc-hwacc/</guid><description>&lt;p&gt;Modern RAN stacks are expected to offload their heaviest DSP workloads
LDPC channel coding chief among them to dedicated accelerators.
Look-aside FEC cards, inline SoCs, and SmartNICs have been standard
integration points in commercial vRAN for several years, and the
open-source ecosystem has largely followed suit.&lt;/p&gt;
&lt;p&gt;Until this release, OCUDU did not. The hardware-abstraction layer, the
upper-PHY factory hooks, and the metric plumbing were present in the
codebase, but the BBDEV backend required to dispatch LDPC operations to
an Intel ACC100 was not implemented. Every deployment therefore executed
LDPC encode and decode on the host CPU, consuming cycles that would
otherwise be available to scheduling, MAC processing, or additional cells.&lt;/p&gt;</description></item><item><title/><link>https://docs.ocuduindia.org/docs/architecture/architecture_doc/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://docs.ocuduindia.org/docs/architecture/architecture_doc/</guid><description>&lt;h1 id="ocudu--5g-gnb-architecture"&gt;OCUDU 5G gNB Architecture&lt;a class="td-heading-self-link" href="#ocudu--5g-gnb-architecture" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h1&gt;
&lt;p&gt;&lt;em&gt;Target audience: RAN engineers. Scope: high-level architectural design of the OCUDU gNB layer responsibilities, inter-layer correlation, deployment topology, and the execution/async fabric that binds them. Deep algorithmic details (scheduling policies, PHY math, coroutine internals) are deliberately out of scope.&lt;/em&gt;&lt;/p&gt;
&lt;hr&gt;
&lt;h2 id="1-what-ocudu-is"&gt;1. What OCUDU Is&lt;a class="td-heading-self-link" href="#1-what-ocudu-is" aria-label="Heading self-link"&gt;&lt;/a&gt;&lt;/h2&gt;
&lt;p&gt;OCUDU is a full 3GPP/O-RAN compliant 5G NR gNB implemented in C++17/C++20. It terminates every standardized RAN interface &lt;strong&gt;Uu&lt;/strong&gt; toward the UE (via PHY/OFH/RU), &lt;strong&gt;F1-C/F1-U&lt;/strong&gt; between CU and DU, &lt;strong&gt;E1&lt;/strong&gt; between CU-CP and CU-UP, &lt;strong&gt;N2/N3&lt;/strong&gt; toward the 5G Core (AMF/UPF), &lt;strong&gt;Xn&lt;/strong&gt; between peer gNBs, and &lt;strong&gt;E2&lt;/strong&gt; toward the near-RT RIC. The codebase is functionally disaggregated so the same binaries can run co-located (&lt;code&gt;gnb&lt;/code&gt;) or split across machines (&lt;code&gt;cu_cp&lt;/code&gt; + &lt;code&gt;cu_up&lt;/code&gt; + &lt;code&gt;du&lt;/code&gt;, with optional &lt;code&gt;du_low&lt;/code&gt; for an O-RAN Split-6 PHY).&lt;/p&gt;</description></item><item><title>About OCUDU India</title><link>https://docs.ocuduindia.org/about/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://docs.ocuduindia.org/about/</guid><description>&lt;section id="td-cover-block-0" class="row td-cover-block td-cover-block--height-auto js-td-cover td-overlay td-overlay--dark -bg-primary" &gt;
 &lt;div class="col-12"&gt;
 &lt;div class="container td-overlay__inner"&gt;
 &lt;div class="text-center"&gt;
 &lt;div class="pt-3 lead"&gt;
&lt;h1&gt;About OCUDU &lt;span class="in-flag"&gt;India&lt;/span&gt;&lt;/h1&gt;
&lt;p class="hero-tagline"&gt;
 A neutral place for Indian operators, vendors, academics, and
 independent engineers to build open RAN technology together under
 open community governance.
&lt;/p&gt;
&lt;/div&gt;
 &lt;/div&gt;
 &lt;/div&gt;
 &lt;/div&gt;
&lt;/section&gt;
&lt;div&gt;&lt;a id="td-block-1" class="td-anchor-no-extra-offset"&gt;&lt;/a&gt;&lt;/div&gt;
&lt;section class="row td-box td-box--white td-box--height-auto"&gt;
&lt;div class="col"&gt;
&lt;div class="row"&gt;
&lt;p&gt;&lt;span class="section-eyebrow"&gt;The project&lt;/span&gt;&lt;/p&gt;
&lt;h2 class="section-heading"&gt;Why OCUDU India exists&lt;/h2&gt;
&lt;div class="feature-list"&gt;
 &lt;div class="feature-item"&gt;
 &lt;span class="feature-num"&gt;01&lt;/span&gt;
 &lt;div class="feature-body"&gt;
 &lt;h3&gt;What we build&lt;/h3&gt;
 &lt;p&gt;Reference specifications, reference implementations, deployment
 blueprints, and conformance test suites for Open RAN. Plus the CI
 harnesses and shared lab infrastructure to validate them.&lt;/p&gt;
 &lt;/div&gt;
 &lt;/div&gt;
 &lt;div class="feature-item"&gt;
 &lt;span class="feature-num"&gt;02&lt;/span&gt;
 &lt;div class="feature-body"&gt;
 &lt;h3&gt;How we govern&lt;/h3&gt;
 &lt;p&gt;Open community governance open TSC, public RFC process, written
 decision log. No single company controls project direction.&lt;/p&gt;</description></item><item><title>Search Results</title><link>https://docs.ocuduindia.org/search/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://docs.ocuduindia.org/search/</guid><description/></item></channel></rss>